Instructions

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The VO-EM CPU can understand and execute commands that are referred to as "opcodes". Each opcode is 6 bits long, and is paired with 26 bits worth of arguments to create a 32 bit instruction.

Terminology

Some DLX-specific terminology is used in this article.

Opcode

A 6-bit value starting at bit 26 of the instruction.

OOOO OOxx  xxxx xxxx  xxxx xxxx  xxxx xxxx 

Modifier

A 6-bit value starting at bit 0 of the instruction. Serves as a secondary opcode in certain instructions.

xxxx xxxx  xxxx xxxx  xxxx xxxx  xxMM MMMM

L

A 26-bit value starting from bit 0 of the instruction.

xxxx xxLL  LLLL LLLL  LLLL LLLL  LLLL LLLL

K

A 16-bit value starting from bit 0 of the instruction.

xxxx xxxx  xxxx xxxx  KKKK KKKK  KKKK KKKK 

i

A 5-bit value starting from bit 21 of the instruction. Used to select a register.

xxxx xxii  iiix xxxx  xxxx xxxx  xxxx xxxx

j

A 5-bit value starting from bit 16 of the instuction. Used to select a register.

xxxx xxxx  xxxj jjjj  xxxx xxxx  xxxx xxxx

k

A 5-bit value starting from bit 11 of the instruction. Used to select a register.

xxxx xxxx  xxxx xxxx  kkkk kxxx  xxxx xxxx

sgn

When placed after L or K (eg, Lsgn, Ksgn), this indicates that the value is to be treated as a signed integer.

uns

When placed after L or K (eg, Luns, Kuns), this indicates that the value is to be treated as an unsigned integer.

ri, rj, rk

Refers to the general-purpose register selected by i, j and k respectively.

si, sj, sk

Special registers (PSW, XBR, XAR) selected by i, j, k.

byte

An 8-bit block of memory - the smallest block addressable by VO-EM.

Halfword

A 16-bit block of memory.

Word

A 32-bit block of memory - the most common memory block used by VO-EM.

Instruction formats

L format

Long immediate-value instructions. Contains simply an opcode and a single, long argument.


OOOO OOLL  LLLL LLLL  LLLL LLLL  LLLL LLLL
|_____||_________________________________| | | Opcode Luns/Lsgn

I format

Immediate-value instructions. Contains two register arguments and an immediate value argument.

OOOO OOii  iiij jjjj  KKKK KKKK  KKKK KKKK
|_____||_____||____|  |__________________|
   |      |      |              |
Opcode    i      j          Kuns/Ksgn

R format

Register to Register instructions. Performs an operation on two registers and stores the result in a third.

OOOO OOii  iiij jjjj  kkkk k000 00MM MMMM  
|_____||_____||____|  |____||____||_____|
   |      |      |       |     |      |
 Opcode   i      j       k   blank modifier

Opcodes

Main article: List of opcodes

There are a lot.